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Processor Architecture

From Dataflow to Superscalar and Beyond

By: Jurij Silc,Borut Robic,Theo Ungerer

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Processor Architecture

From Dataflow to Superscalar and Beyond

By: Jurij Silc,Borut Robic,Theo Ungerer

A survey of architectural mechanisms and implementation techniques for exploiting fine- and coarse-grained parallelism within microprocessors. Beginning with a review of past techniques, the monograph provides a comprehensive account of state-of-the-art techniques used in microprocessors, covering both the concepts involved and implementations in sample processors. The whole is rounded off with a thorough review of the research techniques that will lead to future microprocessors. XXXXXXX Neuer Text This monograph surveys architectural mechanisms and implementation techniques for exploiting fine-grained and coarse-grained parallelism within microprocessors. It presents a comprehensive account of state-of-the-art techniques used in microprocessors that covers both the concepts involved and possible implementations. The authors also provide application-oriented methods and a thorough review of the research techniques that will lead to the development of future processors.

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Page Count

406

Publisher

Springer Science & Business Media

Published Date

ISBN 10

3642585892

ISBN 13

9783642585890

Processor Architecture

From Dataflow to Superscalar and Beyond ; with 34 Tables

By: Jurij Šilc,Borut Robic,Theo Ungerer

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Processor Architecture

From Dataflow to Superscalar and Beyond ; with 34 Tables

By: Jurij Šilc,Borut Robic,Theo Ungerer

A survey of architectural mechanisms and implementation techniques for exploiting fine- and coarse-grained parallelism within microprocessors. Beginning with a review of past techniques, the monograph provides a comprehensive account of state-of-the-art techniques used in microprocessors, covering both the concepts involved and implementations in sample processors. The whole is rounded off with a thorough review of the research techniques that will lead to future microprocessors. XXXXXXX Neuer Text This monograph surveys architectural mechanisms and implementation techniques for exploiting fine-grained and coarse-grained parallelism within microprocessors. It presents a comprehensive account of state-of-the-art techniques used in microprocessors that covers both the concepts involved and possible implementations. The authors also provide application-oriented methods and a thorough review of the research techniques that will lead to the development of future processors.

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Page Count

420

Publisher

Springer Science & Business Media

Published Date

ISBN 10

3540647988

ISBN 13

9783540647980