Gary D. Hachtel's Books

Logic Minimization Algorithms for VLSI Synthesis

By: Robert K. Brayton,Gary D. Hachtel,C. McMullen,Alberto L. Sangiovanni-Vincentelli

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Logic Minimization Algorithms for VLSI Synthesis

By: Robert K. Brayton,Gary D. Hachtel,C. McMullen,Alberto L. Sangiovanni-Vincentelli

The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee.

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204

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Springer Science & Business Media

Published Date

ISBN 10

1461328217

ISBN 13

9781461328216

Logic Synthesis and Verification Algorithms

By: Gary D. Hachtel,Fabio Somenzi

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Logic Synthesis and Verification Algorithms

By: Gary D. Hachtel,Fabio Somenzi

Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves as a basic reference work in design automation for both professionals and students. Logic Synthesis and Verification Algorithms is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits). It combines and integrates modern developments in logic synthesis and formal verification with the more traditional matter of Switching and Finite Automata Theory. The book also provides background material on Boolean algebra and discrete mathematics. A unique feature of this text is the large collection of solved problems. Throughout the text the algorithms covered are the subject of one or more problems based on the use of available synthesis programs.

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579

Publisher

Springer Science & Business Media

Published Date

ISBN 10

0306475928

ISBN 13

9780306475924

Abstraction Refinement for Large Scale Model Checking

By: Chao Wang,Gary D. Hachtel,Fabio Somenzi

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Abstraction Refinement for Large Scale Model Checking

By: Chao Wang,Gary D. Hachtel,Fabio Somenzi

This book summarizes recent research on abstraction techniques for model checking large digital system. Considering the size of today's digital systems and the capacity of state-of-the-art verification algorithms, abstraction is the only viable solution for the successful application of model checking techniques to industrial-scale designs. The suite of algorithms presented here represents significant improvement over prior art; some have already been adopted by the EDA companies in their commercial/in-house verification tools.

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Page Count

186

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Springer Science & Business Media

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ISBN 10

0387346007

ISBN 13

9780387346007

Book's by Gary D. Hachtel

Logic Minimization Algorithms for VLSI Synthesis

Logic Minimization Algorithms for VLSI Synthesis

Logic Synthesis and Verification Algorithms

Logic Synthesis and Verification Algorithms

Abstraction Refinement for Large Scale Model Checking

Abstraction Refinement for Large Scale Model Checking

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