This book introduces a generic and systematic design-time/run-time methodology for handling the dynamic nature of modern embedded systems, without adding large safety margins in the design. The techniques introduced can be utilized on top of most existing static mapping methodologies to deal effectively with dynamism and to increase drastically their efficiency. This methodology is based on the concept of system scenarios, which group system behaviors that are similar from a multi-dimensional cost perspective, such as resource requirements, delay, and energy consumption. Readers will be enabled to design systems capable to adapt to current inputs, improving system quality and/or reducing cost, possibly learning on-the-fly during execution. Provides an effective solution to deal with dynamic system design Includes a broad survey of the state-of-the-art approaches in this domain Enables readers to design for substantial cost improvements (e.g. energy reductions), by exploiting system scenarios Demonstrates how the methodology has been applied effectively on various, real design problems in the embedded system context
Índice abreviado: 1. DTSE in programmable architectures 2. Related compiler work on data transfer and storage management 3. Global loop transformations 4. System-level storage requirement estimation 5. Automated data reuse exploration techniques 6. Storage cycle budget distribution 7. Cache optimization 8. Demonstrator designs 9. Conclussions and future work.
This book discusses analysis, design and optimization techniques for streaming multiprocessor systems, while satisfying a given area, performance, and energy budget. The authors describe design flows for both application-specific and general purpose streaming systems. Coverage also includes the use of machine learning for thermal optimization at run-time, when an application is being executed. The design flow described in this book extends to thermal and energy optimization with multiple applications running sequentially and concurrently.
system is a complex object containing a significant percentage of elec A tronics that interacts with the Real World (physical environments, humans, etc. ) through sensing and actuating devices. A system is heterogeneous, i. e. , is characterized by the co-existence of a large number of components of disparate type and function (for example, programmable components such as micro processors and Digital Signal Processors (DSPs), analog components such as AID and D/A converters, sensors, transmitters and receivers). Any approach to system design today must include software concerns to be viable. In fact, it is now common knowledge that more than 70% of the development cost for complex systems such as automotive electronics and communication systems are due to software development. In addition, this percentage is increasing constantly. It has been my take for years that the so-called hardware-software co-design problem is formulated at a too low level to yield significant results in shorten ing design time to the point needed for next generation electronic devices and systems. The level of abstraction has to be raised to the Architecture-Function co-design problem, where Function refers to the operations that the system is supposed to carry out and Architecture is the set of supporting components for that functionality. The supporting components as we said above are heteroge neous and contain almost always programmable components.
This book features various, ultra low energy, variability resilient SRAM circuit design techniques for wireless sensor network applications. Conventional SRAM design targets area efficiency and high performance at the increased cost of energy consumption, making it unsuitable for computation-intensive sensor node applications. This book, therefore, guides the reader through different techniques at the circuit level for reducing energy consumption and increasing the variability resilience. It includes a detailed review of the most efficient circuit design techniques and trade-offs, introduces new memory architecture techniques, sense amplifier circuits and voltage optimization methods for reducing the impact of variability for the advanced technology nodes.
This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author’s design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes.
This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.
A genuinely useful text that gives an overview of the state-of-the-art in system-level design trade-off explorations for concurrent tasks running on embedded heterogeneous multiple processors. The targeted application domain covers complex embedded real-time multi-media and communication applications. This material is mainly based on research at IMEC and its international university network partners in this area over the last decade. In all, the material those in the digital signal processing industry will find here is bang up-to-date.
Data Access and Storage Management for Embedded Programmable Processors gives an overview of the state-of-the-art in system-level data access and storage management for embedded programmable processors. The targeted application domain covers complex embedded real-time multi-media and communication applications. Many of these applications are data-dominated in the sense that their cost related aspects, namely power consumption and footprint are heavily influenced (if not dominated) by the data access and storage aspects. The material is mainly based on research at IMEC in this area in the period 1996-2001. In order to deal with the stringent timing requirements and the data dominated characteristics of this domain, we have adopted a target architecture style that is compatible with modern embedded processors, and we have developed a systematic step-wise methodology to make the exploration and optimization of such applications feasible in a source-to-source precompilation approach.
Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications is the first book to show how to use high-level synthesis techniques to cope with the stringent timing requirements of complex high-throughput real-time signal and data processing. The book describes the state-of-the-art in architectural synthesis for complex high-throughput real-time processing. Unlike many other, the Synthesis approach used in this book targets an architecture style or an application domain. This approach is thus heavily application-driven and this is illustrated in the book by several realistic demonstration examples used throughout. Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications focuses on domains where application-specific high-speed solutions are attractive such as significant parts of audio, telecom, instrumentation, speech, robotics, medical and automotive processing, image and video processing, TV, multi-media, radar, sonar, etc. Moreover, it addresses mainly the steps above the traditional scheduling and allocation tasks which focus on scalar operations and data. Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications is of interest to researchers, senior design engineers and CAD managers both in academia and industry. It provides an excellent overview of what capabilities to expect from future practical design tools and includes an extensive bibliography.
This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author’s design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes.
Modern consumers carry many electronic devices, like a mobile phone, digital camera, GPS, PDA and an MP3 player. The functionality of each of these devices has gone through an important evolution over recent years, with a steep increase in both the number of features as in the quality of the services that they provide. However, providing the required compute power to support (an uncompromised combination of) all this functionality is highly non-trivial. Designing processors that meet the demanding requirements of future mobile devices requires the optimization of the embedded system in general and of the embedded processors in particular, as they should strike the correct balance between flexibility, energy efficiency and performance. In general, a designer will try to minimize the energy consumption (as far as needed) for a given performance, with a sufficient flexibility. However, achieving this goal is already complex when looking at the processor in isolation, but, in reality, the processor is a single component in a more complex system. In order to design such complex system successfully, critical decisions during the design of each individual component should take into account effect on the other parts, with a clear goal to move to a global Pareto optimum in the complete multi-dimensional exploration space. In the complex, global design of battery-operated embedded systems, the focus of Ultra-Low Energy Domain-Specific Instruction-Set Processors is on the energy-aware architecture exploration of domain-specific instruction-set processors and the co-optimization of the datapath architecture, foreground memory, and instruction memory organisation with a link to the required mapping techniques or compiler steps at the early stages of the design. By performing an extensive energy breakdown experiment for a complete embedded platform, both energy and performance bottlenecks have been identified, together with the important relations between the different components. Based on this knowledge, architecture extensions are proposed for all the bottlenecks.
This book introduces a generic and systematic design-time/run-time methodology for handling the dynamic nature of modern embedded systems, without adding large safety margins in the design. The techniques introduced can be utilized on top of most existing static mapping methodologies to deal effectively with dynamism and to increase drastically their efficiency. This methodology is based on the concept of system scenarios, which group system behaviors that are similar from a multi-dimensional cost perspective, such as resource requirements, delay, and energy consumption. Readers will be enabled to design systems capable to adapt to current inputs, improving system quality and/or reducing cost, possibly learning on-the-fly during execution. Provides an effective solution to deal with dynamic system design Includes a broad survey of the state-of-the-art approaches in this domain Enables readers to design for substantial cost improvements (e.g. energy reductions), by exploiting system scenarios Demonstrates how the methodology has been applied effectively on various, real design problems in the embedded system context
system is a complex object containing a significant percentage of elec A tronics that interacts with the Real World (physical environments, humans, etc. ) through sensing and actuating devices. A system is heterogeneous, i. e. , is characterized by the co-existence of a large number of components of disparate type and function (for example, programmable components such as micro processors and Digital Signal Processors (DSPs), analog components such as AID and D/A converters, sensors, transmitters and receivers). Any approach to system design today must include software concerns to be viable. In fact, it is now common knowledge that more than 70% of the development cost for complex systems such as automotive electronics and communication systems are due to software development. In addition, this percentage is increasing constantly. It has been my take for years that the so-called hardware-software co-design problem is formulated at a too low level to yield significant results in shorten ing design time to the point needed for next generation electronic devices and systems. The level of abstraction has to be raised to the Architecture-Function co-design problem, where Function refers to the operations that the system is supposed to carry out and Architecture is the set of supporting components for that functionality. The supporting components as we said above are heteroge neous and contain almost always programmable components.
This book discusses analysis, design and optimization techniques for streaming multiprocessor systems, while satisfying a given area, performance, and energy budget. The authors describe design flows for both application-specific and general purpose streaming systems. Coverage also includes the use of machine learning for thermal optimization at run-time, when an application is being executed. The design flow described in this book extends to thermal and energy optimization with multiple applications running sequentially and concurrently.
This book provides a systematic and unified methodology, including basic principles and reusable processes, for dynamic memory management (DMM) in embedded systems. The authors describe in detail how to design and optimize the use of dynamic memory in modern, multimedia and network applications, targeting the latest generation of portable embedded systems, such as smartphones. Coverage includes a variety of design and optimization topics in electronic design automation of DMM, from high-level software optimization to microarchitecture-level hardware support. The authors describe the design of multi-layer dynamic data structures for the final memory hierarchy layers of the target portable embedded systems and how to create a low-fragmentation, cost-efficient, dynamic memory management subsystem out of configurable components for the particular memory allocation and de-allocation patterns for each type of application. The design methodology described in this book is based on propagating constraints among design decisions from multiple abstraction levels (both hardware and software) and customizing DMM according to application-specific data access and storage behaviors.
This book defines and explores the problem of placing the instances of dynamic data types on the components of the heterogeneous memory organization of an embedded system, with the final goal of reducing energy consumption and improving performance. It is one of the first to cover the problem of placement for dynamic data objects on embedded systems with heterogeneous memory architectures, presenting a complete methodology that can be easily adapted to real cases and work flows. The authors discuss how to improve system performance and energy consumption simultaneously. Discusses the problem of placement for dynamic data objects on embedded systems with heterogeneous memory architectures; Presents a complete methodology that can be adapted easily to real cases and work flows; Offers hints on how to improve system performance and energy consumption simultaneously.
This book features various, ultra low energy, variability resilient SRAM circuit design techniques for wireless sensor network applications. Conventional SRAM design targets area efficiency and high performance at the increased cost of energy consumption, making it unsuitable for computation-intensive sensor node applications. This book, therefore, guides the reader through different techniques at the circuit level for reducing energy consumption and increasing the variability resilience. It includes a detailed review of the most efficient circuit design techniques and trade-offs, introduces new memory architecture techniques, sense amplifier circuits and voltage optimization methods for reducing the impact of variability for the advanced technology nodes.
The main intention of this book is to give an impression of the state-of-the-art in system-level memory management (data transfer and storage) related issues for complex data-dominated real-time signal and data processing applications. The material is based on research at IMEC in this area in the period 1989- 1997. In order to deal with the stringent timing requirements and the data dominated characteristics of this domain, we have adopted a target architecture style and a systematic methodology to make the exploration and optimization of such systems feasible. Our approach is also very heavily application driven which is illustrated by several realistic demonstrators, partly used as red-thread examples in the book. Moreover, the book addresses only the steps above the traditional high-level synthesis (scheduling and allocation) or compilation (traditional or ILP oriented) tasks. The latter are mainly focussed on scalar or scalar stream operations and data where the internal structure of the complex data types is not exploited, in contrast to the approaches discussed here. The proposed methodologies are largely independent of the level of programmability in the data-path and controller so they are valuable for the realisation of both hardware and software systems. Our target domain consists of signal and data processing systems which deal with large amounts of data.
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